arm64: dts: rockchip: enable usb ports on Qnap-TS433

A patch from »Expand available features on Qnap TS433« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Thu, 11 Jul 2024 23:24:03 +0200

Commit-Message

Enable usb controllers and phys and add regulator infrastructure for the usb ports on the TS433. Of course there are no schematics available for the device, so the regulator information comes from the vendor-devicetree with unknown accuracy. Tested-by: Uwe Kleine-König <ukleinek@...> Signed-off-by: Heiko Stuebner <heiko@...>

Patch-Comment

.../boot/dts/rockchip/rk3568-qnap-ts433.dts | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+)

Statistics

  • 105 lines added
  • 0 lines removed

Changes

-------------- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts --------------
index bc26f2e98c185..da735c4764f4d 100644
@@ -31,6 +31,49 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
vin-supply = <&dc_12v>;
};
+
+ vcc5v0_host: regulator-vcc5v0-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
+ vcc5v0_otg: regulator-vcc5v0-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_otg_en>;
+ regulator-name = "vcc5v0_otg";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
+ vcc5v0_usb: regulator-vcc5v0-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+};
+
+/* connected to usb_host0_xhci */
+&combphy0 {
+ status = "okay";
};
&gmac0 {
@@ -97,6 +140,18 @@ &pcie3x2 {
status = "okay";
};
+&pinctrl {
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc5v0_otg_en: vcc5v0-otg-en {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
@@ -121,3 +176,53 @@ &uart0 {
&uart2 {
status = "okay";
};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+/* connected to usb_host0_xhci */
+&usb2phy0_otg {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+/* connected to usb_host1_ehci/ohci */
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+/* connected to usb_host0_ehci/ohci */
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+/* right port backside */
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+/* front port */
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
+/* left port backside */
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
 
 

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