pinctrl: rockchip: fix handling of first pinbank

A patchset in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Wed, 26 Mar 2014 00:37:01 +0100

Am Dienstag, 25. März 2014, 20:43:59 schrieb Beniamino Galvani: > On Tue, Mar 25, 2014 at 12:14:42AM +0100, Heiko Stübner wrote: > > GPIO0 only has the second two IOMUX registers: > > - GRF_GPIO0C_IOMUX at 0x68 > > - GRF_GPIO0D_IOMUX at 0x6c > > which I guess is where my mistake comes from. [...] > On radxa rock schematic pins GPIO0A* and GPIO0B* are labeled only as > gpios, without alternate functions like other pins; my guess is that > on rk3188 they can only act as gpios and so mux registers are not > needed for them. That was my guess too - especially as the registers are also missing. Therefore I put together the following two patches to go on top of your patch and also make rockchip_set_mux honor this situation. Heiko Stuebner (2): pinctrl: rockchip: add return value to rockchip_set_mux pinctrl: rockchip: handle first half of rk3188-bank0 correctly drivers/pinctrl/pinctrl-rockchip.c | 46 ++++++++++++++++++++++++++++++++------ 1 file changed, 39 insertions(+), 7 deletions(-) -- 1.9.0

Patches in this set


  • 2 individual patches
  • 39 lines added
  • 7 lines removed

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