ARM: dts: rockchip: move rk3288 usbphy under the GRF node

A patch from »move Rockchip usbphy under the GRF mfd« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Sat, 26 Mar 2016 22:49:57 +0100

Commit-Message

The rk3288 usbphy is completely enclosed in the general register files and the updated binding allows it to be a subnode of the GRF now. So move the node appropriately. Signed-off-by: Heiko Stuebner <heiko@...>

Patch-Comment

arch/arm/boot/dts/rk3288.dtsi | 63 +++++++++++++++++++++---------------------- 1 file changed, 31 insertions(+), 32 deletions(-)

Statistics

  • 31 lines added
  • 32 lines removed

Changes

------------------------ arch/arm/boot/dts/rk3288.dtsi -------------------------
index bc57232..e746d35 100644
@@ -747,6 +747,37 @@
grf: syscon@ff770000 {
compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
reg = <0xff770000 0x1000>;
+
+ usbphy: usbphy {
+ compatible = "rockchip,rk3288-usb-phy";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ usbphy0: usb-phy0 {
+ #phy-cells = <0>;
+ reg = <0x320>;
+ clocks = <&cru SCLK_OTGPHY0>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ };
+
+ usbphy1: usb-phy1 {
+ #phy-cells = <0>;
+ reg = <0x334>;
+ clocks = <&cru SCLK_OTGPHY1>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ };
+
+ usbphy2: usb-phy2 {
+ #phy-cells = <0>;
+ reg = <0x348>;
+ clocks = <&cru SCLK_OTGPHY2>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ };
+ };
};
wdt: watchdog@ff800000 {
@@ -959,38 +990,6 @@
};
};
- usbphy: phy {
- compatible = "rockchip,rk3288-usb-phy";
- rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- usbphy0: usb-phy0 {
- #phy-cells = <0>;
- reg = <0x320>;
- clocks = <&cru SCLK_OTGPHY0>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- };
-
- usbphy1: usb-phy1 {
- #phy-cells = <0>;
- reg = <0x334>;
- clocks = <&cru SCLK_OTGPHY1>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- };
-
- usbphy2: usb-phy2 {
- #phy-cells = <0>;
- reg = <0x348>;
- clocks = <&cru SCLK_OTGPHY2>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- };
- };
-
pinctrl: pinctrl {
compatible = "rockchip,rk3288-pinctrl";
rockchip,grf = <&grf>;
 
 

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