nvmem: rockchip-otp: Add support for RK3568
From: Finley Xiao <finley.xiao@...> Date: Tue, 15 Apr 2025 18:32:02 +0800
Commit-Message
This adds the necessary data for handling otp the rk3568. Signed-off-by: Finley Xiao <finley.xiao@...> Signed-off-by: Kever Yang <kever.yang@...> Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
drivers/nvmem/rockchip-otp.c | 69 ++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+)
Statistics
- 69 lines added
- 0 lines removed
Changes
------------------------- drivers/nvmem/rockchip-otp.c -------------------------
index 45bbb6147fb7..cfb69bc58869 100644
@@ -27,6 +27,7 @@
#define OTPC_USER_CTRL 0x0100
#define OTPC_USER_ADDR 0x0104
#define OTPC_USER_ENABLE 0x0108
+#define OTPC_USER_QP 0x0120
#define OTPC_USER_Q 0x0124
#define OTPC_INT_STATUS 0x0304
#define OTPC_SBPI_CMD0_OFFSET 0x1000
@@ -184,6 +185,58 @@ static int px30_otp_read(void *context, unsigned int offset,
return ret;
}
+static int rk3568_otp_read(void *context, unsigned int offset, void *val,
+ size_t count)
+{
+ struct rockchip_otp *otp = context;
+ u16 *buf = val;
+ u32 otp_qp;
+ int ret;
+
+ ret = rockchip_otp_reset(otp);
+ if (ret) {
+ dev_err(otp->dev, "failed to reset otp phy\n");
+ return ret;
+ }
+
+ ret = rockchip_otp_ecc_enable(otp, true);
+ if (ret) {
+ dev_err(otp->dev, "rockchip_otp_ecc_enable err\n");
+ return ret;
+ }
+
+ writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+ udelay(5);
+
+ while (count--) {
+ writel(offset++ | OTPC_USER_ADDR_MASK,
+ otp->base + OTPC_USER_ADDR);
+ writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
+ otp->base + OTPC_USER_ENABLE);
+
+ ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS,
+ OTPC_USER_DONE);
+ if (ret) {
+ dev_err(otp->dev, "timeout during read setup\n");
+ goto read_end;
+ }
+
+ otp_qp = readl(otp->base + OTPC_USER_QP);
+ if (((otp_qp & 0xc0) == 0xc0) || (otp_qp & 0x20)) {
+ ret = -EIO;
+ dev_err(otp->dev, "ecc check error during read setup\n");
+ goto read_end;
+ }
+
+ *buf++ = readl(otp->base + OTPC_USER_Q);
+ }
+
+read_end:
+ writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+
+ return ret;
+}
+
static int rk3588_otp_read(void *context, unsigned int offset,
void *val, size_t count)
{
@@ -280,6 +333,18 @@ static const struct rockchip_data px30_data = {
.reg_read = px30_otp_read,
};
+static const char * const rk3568_otp_clocks[] = {
+ "otp", "apb_pclk", "phy", "sbpi",
+};
+
+static const struct rockchip_data rk3568_data = {
+ .size = 0x80,
+ .word_size = sizeof(u16),
+ .clks = rk3568_otp_clocks,
+ .num_clks = ARRAY_SIZE(rk3568_otp_clocks),
+ .reg_read = rk3568_otp_read,
+};
+
static const struct rockchip_data rk3576_data = {
.size = 0x100,
.read_offset = 0x700,
@@ -311,6 +376,10 @@ static const struct of_device_id rockchip_otp_match[] = {
.compatible = "rockchip,rk3308-otp",
.data = &px30_data,
},
+ {
+ .compatible = "rockchip,rk3568-otp",
+ .data = &rk3568_data,
+ },
{
.compatible = "rockchip,rk3576-otp",
.data = &rk3576_data,