arm64: dts: rockchip: Correctly describe the ethernet phy
From: Heiko Stuebner <heiko.stuebner@...> Date: Sun, 19 Oct 2025 01:01:11 +0200
Commit-Message
So far, the board used the phy implicitly using the deprecated snps reset properties. Improve that and describe the PHY correctly under the new mdio node. Signed-off-by: Heiko Stuebner <heiko.stuebner@...>
Patch-Comment
arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi | 22 ++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-)
Statistics
- 19 lines added
- 3 lines removed
Changes
---------------- arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi -----------------
index 8ccc3184a836..61c52bd91784 100644
@@ -154,13 +154,11 @@ &gmac {
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
clock_in_out = "input";
+ phy-handle = <&vsc8531_2>;
phy-supply = <&vcc33_io>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x10>;
rx_delay = <0x10>;
status = "okay";
@@ -285,7 +283,25 @@ &io_domains {
status = "okay";
};
+&mdio {
+ vsc8531_2: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&phy_rst>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
+ };
+};
+
&pinctrl {
+ ethernet {
+ phy_rst: phy-rst {
+ rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
leds {
module_led_pins: module-led-pins {
rockchip,pins =