dt-bindings: add documentation for rk3188 clock and reset unit
From: Heiko Stuebner <heiko@...> Date: Sun, 13 Apr 2014 18:48:28 +0200
Commit-Message
This add bindings documentation for the clock and reset unit found on rk3188 SoCs from Rockchip. Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
.../bindings/clock/rockchip,rk3188-cru.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt
Statistics
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- 0 lines removed
Changes
------- Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt --------
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+* Rockchip RK3188 Clock and Reset Unit
+
+The RK3188 clock controller generates and supplies clock to various controllers
+within the SoC and also implements a reset controller for SoC peripherals.
+There exist two variants of the rk3188 SoC, the rk3188 and rk3188a, with
+slight differences in the pll handling.
+
+Required Properties:
+
+- compatible: should be "rockchip,rk3188-cru" or "rockchip,rk3188a-cru"
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files"
+ If missing pll rates are not changable, due to the missing pll lock status.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in dt-bindings/clock/rk3188-cru.h header and can be used
+in device tree sources.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xin24m" - crystal input - required,
+ - "xin32k" - rtc clock - optional,
+ - "ext_hsadc" - external HSADC clock - optional,
+ - "ext_cif" - external camera clock - optional,
+ - "ext_rmii" - external RMII clock - optional,
+ - "ext_jtag" - externalJTAG clock - optional
+
+Example: Clock controller node:
+
+ cru: cru@20000000 {
+ compatible = "rockchip,rk3188-cru";
+ reg = <0x20000000 0x1000>;
+ rockchip,grf = <&grf>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+Example: UART controller node that consumes the clock generated by the clock
+ controller:
+
+ uart0: serial@10124000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x10124000 0x400>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <1>;
+ clocks = <&cru SCLK_UART0>;
+ };