net: stmmac: dwmac-rk: Fix clk rate when provided by soc
From: Heiko Stuebner <heiko@...> Date: Tue, 16 Jun 2015 20:43:43 +0200
Commit-Message
The first iteration of the dwmac-rk support did access an intermediate clock directly below the pll selector. This was removed in a subsequent revision, but the clock and one invocation remained. This results in the driver trying to set the rate of a non-existent clock when the soc and not some external source provides the phy clock for RMII phys. So set the rate of the correct clock and remove the remaining now completely unused definition. Fixes: 436f5ae08f9d ("GMAC: add driver for Rockchip RK3288 SoCs integrated GMAC") Cc: stable@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
Statistics
- 1 lines added
- 2 lines removed