riscv: use BIT macros in t-head errata init

A patch from »riscv: cleanup svpbmt cpufeature probing« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Thu, 1 Sep 2022 16:56:07 +0200

Commit-Message

Using the appropriate BIT macro makes the code better readable. Suggested-by: Conor Dooley <conor.dooley@...> Signed-off-by: Heiko Stuebner <heiko@...>

Patch-Comment

arch/riscv/errata/thead/errata.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

Statistics

  • 2 lines added
  • 2 lines removed

Changes

----------------------- arch/riscv/errata/thead/errata.c -----------------------
index bffa711aaf64..a6f4bd8ccf3f 100644
@@ -49,10 +49,10 @@ static u32 thead_errata_probe(unsigned int stage,
u32 cpu_req_errata = 0;
if (errata_probe_pbmt(stage, archid, impid))
- cpu_req_errata |= (1U << ERRATA_THEAD_PBMT);
+ cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);
if (errata_probe_cmo(stage, archid, impid))
- cpu_req_errata |= (1U << ERRATA_THEAD_CMO);
+ cpu_req_errata |= BIT(ERRATA_THEAD_CMO);
return cpu_req_errata;
}
 
 

Recent Patches

About Us

Sed lacus. Donec lectus. Nullam pretium nibh ut turpis. Nam bibendum. In nulla tortor, elementum vel, tempor at, varius non, purus. Mauris vitae nisl nec metus placerat consectetuer.

Read More...