riscv: drop some idefs from CMO initialization

A patch from »riscv: cleanup svpbmt cpufeature probing« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Thu, 1 Sep 2022 16:52:08 +0200

Commit-Message

Wrapping things in #ifdefs makes the code harder to read while we also have IS_ENABLED() macros to do this in regular code and the extension detection is not _that_ runtime critical. So define a stub for riscv_noncoherent_supported() in the non-CONFIG_RISCV_DMA_NONCOHERENT case and move the code to us IS_ENABLED. Suggested-by: Conor Dooley <conor.dooley@...> Signed-off-by: Heiko Stuebner <heiko@...>

Patch-Comment

arch/riscv/errata/thead/errata.c | 7 +++---- arch/riscv/include/asm/cacheflush.h | 2 ++ arch/riscv/kernel/cpufeature.c | 22 +++++++++------------- 3 files changed, 14 insertions(+), 17 deletions(-)

Statistics

  • 14 lines added
  • 17 lines removed

Changes

----------------------- arch/riscv/errata/thead/errata.c -----------------------
index 202c83f677b2..bffa711aaf64 100644
@@ -30,7 +30,9 @@ static bool errata_probe_pbmt(unsigned int stage,
static bool errata_probe_cmo(unsigned int stage,
unsigned long arch_id, unsigned long impid)
{
-#ifdef CONFIG_ERRATA_THEAD_CMO
+ if (!IS_ENABLED(CONFIG_ERRATA_THEAD_CMO))
+ return false;
+
if (arch_id != 0 || impid != 0)
return false;
@@ -39,9 +41,6 @@ static bool errata_probe_cmo(unsigned int stage,
riscv_noncoherent_supported();
return true;
-#else
- return false;
-#endif
}
static u32 thead_errata_probe(unsigned int stage,
--------------------- arch/riscv/include/asm/cacheflush.h ----------------------
index a60acaecfeda..4363d0beb38a 100644
@@ -50,6 +50,8 @@ static inline void riscv_init_cbom_blocksize(void) { }
#ifdef CONFIG_RISCV_DMA_NONCOHERENT
void riscv_noncoherent_supported(void);
+#else
+static inline void riscv_noncoherent_supported(void) {}
#endif
/*
------------------------ arch/riscv/kernel/cpufeature.c ------------------------
index 764ea220161f..729f7a218093 100644
@@ -264,21 +264,17 @@ static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)
{
-#ifdef CONFIG_RISCV_ISA_ZICBOM
- switch (stage) {
- case RISCV_ALTERNATIVES_EARLY_BOOT:
+ if (!IS_ENABLED(CONFIG_RISCV_ISA_ZICBOM))
+ return false;
+
+ if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
+ return false;
+
+ if (!riscv_isa_extension_available(NULL, ZICBOM))
return false;
- default:
- if (riscv_isa_extension_available(NULL, ZICBOM)) {
- riscv_noncoherent_supported();
- return true;
- } else {
- return false;
- }
- }
-#endif
- return false;
+ riscv_noncoherent_supported();
+ return true;
}
/*
 
 

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