clk: rockchip: convert basic pll lock_wait to use
From: Heiko Stuebner <heiko.stuebner@...> Date: Mon, 20 Jan 2020 16:08:40 +0100
Commit-Message
Instead of open coding the polling of the lock status, use the handy regmap_read_poll_timeout for this. As the pll locking is normally blazingly fast and we don't want to incur additional delays, we're not doing any sleeps similar to for example the imx clk-pllv4 and define a very safe but still short timeout of 1ms. Suggested-by: Stephen Boyd <sboyd@...> Signed-off-by: Heiko Stuebner <heiko.stuebner@...>
Patch-Comment
drivers/clk/rockchip/clk-pll.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-)
Statistics
- 6 lines added
- 15 lines removed
Changes
------------------------ drivers/clk/rockchip/clk-pll.c ------------------------
index 43c9fd0086a2..26ca46d49191 100644
@@ -86,23 +86,14 @@ static int rockchip_pll_wait_lock(struct rockchip_clk_pll *pll)
{
struct regmap *grf = pll->ctx->grf;
unsigned int val;
+ int ret;
+ ret = regmap_read_poll_timeout(grf, pll->lock_offset, val,
+ val & BIT(pll->lock_shift), 0, 1000);
+ if (ret)
+ pr_err("%s: timeout waiting for pll to lock\n", __func__);
+ return ret;
}
/**