From: Heiko Stuebner <heiko@...>
Date: Thu, 8 Sep 2011 21:18:56 +0200
Commit-Message
The S3C2443-adc is 10 bit wide and has its mux-select
in an extra register at base+0x18
Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
changes since v1:
wrap line over 80 chars and move setname call
arch/arm/mach-s3c2443/s3c2443.c | 3 +++
arch/arm/plat-samsung/adc.c | 7 +++++++
2 files changed, 10 insertions(+), 0 deletions(-)
Statistics
- 10 lines added
- 0 lines removed
Changes
@@ -41,6 +41,7 @@
#include <plat/cpu.h>
#include <plat/fb-core.h>
#include <plat/nand-core.h>
+#include <plat/adc-core.h>
static struct map_desc s3c2443_iodesc[] __initdata = {
IODESC_ENT(WATCHDOG),
@@ -70,6 +71,8 @@ int __init s3c2443_init(void)
s3c_nand_setname("s3c2412-nand");
s3c_fb_setname("s3c2443-fb");
+ s3c_adc_setname("s3c2443-adc");
+
/* change WDT IRQ number */
s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
@@ -129,6 +129,9 @@ static inline void s3c_adc_select(struct adc_device *adc,
if (!client->is_ts) {
if (cpu & S3C_ADC_QUIRK_MUX1C)
writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
+ else if (cpu & S3C_ADC_QUIRK_MUX18)
+ writel(client->channel & 0xf,
+ adc->regs + S3C2443_ADCMUX);
else
con |= S3C2410_ADCCON_SELMUX(client->channel);
}
@@ -517,6 +520,10 @@ static struct platform_device_id s3c_adc_driver_ids[] = {
.driver_data = S3C_ADC_QUIRK_10BIT |
S3C_ADC_QUIRK_MUXADCCON,
}, {
+ .name = "s3c2443-adc",
+ .driver_data = S3C_ADC_QUIRK_10BIT |
+ S3C_ADC_QUIRK_MUX18,
+ }, {
.name = "s3c64xx-adc",
.driver_data = S3C_ADC_QUIRK_12BIT |
S3C_ADC_QUIRK_MUXADCCON |