ARM: dts: rockchip: add tuning related settings to veyron
From: Heiko Stuebner <heiko@...> Date: Mon, 31 Aug 2015 20:24:06 +0200
Commit-Message
This allows the tuning code to run and use higher speeds on capable cards. Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi | 7 ++++++- arch/arm/boot/dts/rk3288-veyron.dtsi | 6 ++++++ 2 files changed, 12 insertions(+), 1 deletion(-)
Statistics
- 12 lines added
- 1 lines removed
Changes
------------------ arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi ------------------
index b5334ec..fec076e 100644
@@ -90,7 +90,7 @@
regulators {
vccio_sd: LDO_REG4 {
regulator-name = "vccio_sd";
+ regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
@@ -116,7 +116,12 @@
cap-sd-highspeed;
card-detect-delay = <200>;
cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+ rockchip,default-sample-phase = <90>;
num-slots = <1>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
vmmc-supply = <&vcc33_sd>;
vqmmc-supply = <&vccio_sd>;
};
--------------------- arch/arm/boot/dts/rk3288-veyron.dtsi ---------------------
index 6820977..04c3d2a 100644
@@ -196,7 +196,9 @@
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
+ rockchip,default-sample-phase = <158>;
disable-wp;
+ mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
non-removable;
num-slots = <1>;
@@ -413,6 +415,10 @@
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
vmmc-supply = <&vcc33_sys>;
vqmmc-supply = <&vcc18_wl>;
};