clk: rockchip: fix rk3188 hsadc_frac definition
From: Heiko Stuebner <heiko@...> Date: Thu, 30 Oct 2014 13:03:41 +0100
Commit-Message
The arguments to COMPOSITE_FRAC for hsadc_frac were mangled, leaving out the the general clock flags argument. This results in strange effects, as only sometimes a zero-division is reported as the wrong register is read. Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
drivers/clk/rockchip/clk-rk3188.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Statistics
- 2 lines added
- 2 lines removed
Changes
---------------------- drivers/clk/rockchip/clk-rk3188.c -----------------------
index 0bc0e7d..b5c7c01 100644
@@ -320,9 +320,9 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
RK2928_CLKGATE_CON(2), 6, GFLAGS),
+ COMPOSITE_FRAC(0, "hsadc_frac", "hsadc_src", 0,
RK2928_CLKSEL_CON(23), 0,
+ RK2928_CLKGATE_CON(2), 7, GFLAGS),
MUX(SCLK_HSADC, "sclk_hsadc", mux_sclk_hsadc_p, 0,
RK2928_CLKSEL_CON(22), 4, 2, MFLAGS),