ARM: rockchip: rename osc_switch_to_32k variable
From: Heiko Stuebner <heiko@...> Date: Wed, 5 Aug 2015 00:14:55 +0200
Commit-Message
The variable name is misleading, as the deep suspend mode always switches the main supplying clock to the 32kHz source. Additionally the main oscillator remain running in some cases, which this var indicates. So rename it to osc_disable to clarity. Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
arch/arm/mach-rockchip/pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Statistics
- 2 lines added
- 2 lines removed
Changes
------------------------- arch/arm/mach-rockchip/pm.c --------------------------
index 892bace..2ca1170 100644
@@ -96,7 +96,7 @@ static bool rk3288_slp_disable_osc(void)
static void rk3288_slp_mode_set(int level)
{
u32 mode_set, mode_set1;
+ bool osc_disable = rk3288_slp_disable_osc();
regmap_read(sgrf_regmap, RK3288_SGRF_CPU_CON0, &rk3288_sgrf_cpu_con0);
regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0);
@@ -140,7 +140,7 @@ static void rk3288_slp_mode_set(int level)
BIT(PMU_DDR1IO_RET_EN) | BIT(PMU_DDR0IO_RET_EN) |
BIT(PMU_ALIVE_USE_LF) | BIT(PMU_PLL_PD_EN);
+ if (osc_disable)
mode_set |= BIT(PMU_OSC_24M_DIS);
mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) |