ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
From: Heiko Stuebner <heiko@...> Date: Wed, 22 Jul 2015 17:18:03 +0200
Commit-Message
PMU_GPIOINT_WAKEUP_EN seems needed when entering the shallow suspend (with logic staying on) but does not seem to be needed for the deep suspend for unknown reasons. Testing revealed that this setting really is necessary to reliably resume the veyron devices from suspend. Reported-by: Chris Zhong <zyw@...> Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
arch/arm/mach-rockchip/pm.c | 9 ++++++--- arch/arm/mach-rockchip/pm.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-)
Statistics
- 7 lines added
- 3 lines removed
Changes
------------------------- arch/arm/mach-rockchip/pm.c --------------------------
index 04d3028..801541e 100644
@@ -123,9 +123,6 @@ static void rk3288_slp_mode_set(int level)
regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR,
rk3288_bootram_phy);
mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) |
BIT(PMU_SREF0_ENTER_EN) | BIT(PMU_SREF1_ENTER_EN) |
BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) |
@@ -146,6 +143,9 @@ static void rk3288_slp_mode_set(int level)
mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) |
BIT(PMU_CLR_PERI) | BIT(PMU_CLR_DMA);
+ regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1,
+ PMU_ARMINT_WAKEUP_EN);
+
/* 30ms on a 32kHz clock for osc and pmic stabilization */
regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, 32 * 30);
regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, 32 * 30);
@@ -157,6 +157,9 @@ static void rk3288_slp_mode_set(int level)
*/
mode_set |= BIT(PMU_CLK_CORE_SRC_GATE_EN);
+ regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1,
+ PMU_ARMINT_WAKEUP_EN | PMU_GPIOINT_WAKEUP_EN);
+
/* 30ms on a 24MHz clock for osc and pmic stabilization */
regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, 24000 * 30);
regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, 24000 * 30);
------------------------- arch/arm/mach-rockchip/pm.h --------------------------
index 8a55ee2..b5af26f 100644
@@ -61,6 +61,7 @@ static inline void rockchip_suspend_init(void)
/* PMU_WAKEUP_CFG1 bits */
#define PMU_ARMINT_WAKEUP_EN BIT(0)
+#define PMU_GPIOINT_WAKEUP_EN BIT(3)
enum rk3288_pwr_mode_con {
PMU_PWR_MODE_EN = 0,