PatchTrack

From: Heiko Stuebner <heiko@...> Date: Sat, 11 Sep 2021 17:21:36 +0800

Commit-Message

The Zicbom ISA-extension was ratified in november 2021 and introduces instructions for dcache invalidate, clean and flush operations. Implement cache management operations based on them. Of course not all cores will support this, so implement an alternative-based mechanism that replaces empty instructions with ones done around Zicbom instructions. We're using prebuild instructions for the Zicbom instructions for now, to not require a bleeding-edge compiler (gcc-12) for these somewhat simple instructions. Signed-off-by: Heiko Stuebner <heiko@...> Reviewed-by: Anup Patel <anup@...> Reviewed-by: Guo Ren <guoren@...> Cc: Christoph Hellwig <hch@...> Cc: Atish Patra <atish.patra@...> Cc: Guo Ren <guoren@...>

Patch-Comment

arch/riscv/Kconfig | 15 +++++ arch/riscv/include/asm/cacheflush.h | 6 ++ arch/riscv/include/asm/errata_list.h | 36 ++++++++++- arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/kernel/cpu.c | 1 + arch/riscv/kernel/cpufeature.c | 18 ++++++ arch/riscv/kernel/setup.c | 2 + arch/riscv/mm/Makefile | 1 + arch/riscv/mm/dma-noncoherent.c | 93 ++++++++++++++++++++++++++++ 9 files changed, 172 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/mm/dma-noncoherent.c

Statistics

• 172 lines added
• 1 lines removed

Changes