ARM: S3C24XX: number the dma clocks

A patch from »ARM: S3C24XX: add dmaengine based dma-driver« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Sat, 11 May 2013 13:30:43 +0200

Commit-Message

Each dma channel has its own clock. The upcoming dma driver wants to handle these itself and therefore needs to be able to get the correct clock for a channel. Therefore rename the dma clocks to "dma.X" for s3c2412, s3c2416 and s3c2443. This does not change the behaviour for the old dma driver at all, as all dma clocks are still always on and not handled by the old dma driver at all. Signed-off-by: Heiko Stuebner <heiko@...> Acked-by: Linus Walleij <linus.walleij@...>

Patch-Comment

changes since v2: - remove noise from commit message arch/arm/mach-s3c24xx/clock-s3c2412.c | 8 ++++---- arch/arm/mach-s3c24xx/common-s3c2443.c | 12 ++++++------ 2 files changed, 10 insertions(+), 10 deletions(-)

Statistics

  • 10 lines added
  • 10 lines removed

Changes

-------------------- arch/arm/mach-s3c24xx/clock-s3c2412.c ---------------------
index 2cc017d..26e2bdc 100644
@@ -484,22 +484,22 @@ static struct clk init_clocks_disable[] = {
static struct clk init_clocks[] = {
{
- .name = "dma",
+ .name = "dma.0",
.parent = &clk_h,
.enable = s3c2412_clkcon_enable,
.ctrlbit = S3C2412_CLKCON_DMA0,
}, {
- .name = "dma",
+ .name = "dma.1",
.parent = &clk_h,
.enable = s3c2412_clkcon_enable,
.ctrlbit = S3C2412_CLKCON_DMA1,
}, {
- .name = "dma",
+ .name = "dma.2",
.parent = &clk_h,
.enable = s3c2412_clkcon_enable,
.ctrlbit = S3C2412_CLKCON_DMA2,
}, {
- .name = "dma",
+ .name = "dma.3",
.parent = &clk_h,
.enable = s3c2412_clkcon_enable,
.ctrlbit = S3C2412_CLKCON_DMA3,
-------------------- arch/arm/mach-s3c24xx/common-s3c2443.c --------------------
index f6b9f2e..65d3eef 100644
@@ -438,32 +438,32 @@ static struct clk init_clocks_off[] = {
static struct clk init_clocks[] = {
{
- .name = "dma",
+ .name = "dma.0",
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2443_HCLKCON_DMA0,
}, {
- .name = "dma",
+ .name = "dma.1",
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2443_HCLKCON_DMA1,
}, {
- .name = "dma",
+ .name = "dma.2",
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2443_HCLKCON_DMA2,
}, {
- .name = "dma",
+ .name = "dma.3",
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2443_HCLKCON_DMA3,
}, {
- .name = "dma",
+ .name = "dma.4",
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2443_HCLKCON_DMA4,
}, {
- .name = "dma",
+ .name = "dma.5",
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2443_HCLKCON_DMA5,
 
 

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