dt-bindings: adapt rockchip-pinctrl doc to changed bindings
From: Heiko Stuebner <heiko@...> Date: Tue, 29 Apr 2014 21:58:33 +0200
Commit-Message
Introduce the syscons for grf and pmu and deprecate the previous register areas. Signed-off-by: Heiko Stuebner <heiko@...> Tested-by: Max Schwarz <max.schwarz@...>
Patch-Comment
.../bindings/pinctrl/rockchip,pinctrl.txt | 28 +++++++++++++++------- 1 file changed, 20 insertions(+), 8 deletions(-)
Statistics
- 20 lines added
- 8 lines removed
Changes
-------- Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt --------
index 78dafc9..cefef74 100644
@@ -21,15 +21,23 @@ defined as gpio sub-nodes of the pinmux controller.
Required properties for iomux controller:
- compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"
"rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl"
+ - rockchip,grf: phandle referencing a syscon providing the
+ "general register files"
+
+Optional properties for iomux controller:
+ - rockchip,pmu: phandle referencing a syscon providing the pmu registers
+ as some SoCs carry parts of the iomux controller registers there.
+ Required for at least rk3188 and rk3288.
+
+Deprecated properties for iomux controller:
- reg: first element is the general register space of the iomux controller
It should be large enough to contain also separate pull registers.
+ second element is the separate pull register space of the rk3188.
+ Use rockchip,grf and rockchip,pmu described above instead.
Required properties for gpio sub nodes:
- compatible: "rockchip,gpio-bank", "rockchip,rk3188-gpio-bank0"
- reg: register of the gpio bank (different than the iomux registerset)
- interrupts: base interrupt of the gpio bank in the interrupt controller
- clocks: clock that drives this bank
- gpio-controller: identifies the node as a gpio controller and pin bank.
@@ -41,6 +49,10 @@ Required properties for gpio sub nodes:
cells should use the standard two-cell scheme described in
bindings/interrupt-controller/interrupts.txt
+Deprecated properties for gpio sub nodes:
+ - reg: second element: separate pull register for rk3188 bank0, use
+ rockchip,pmu described above instead
+
Required properties for pin configuration node:
- rockchip,pins: 3 integers array, represents a group of pins mux and config
setting. The format is rockchip,pins = <PIN_BANK PIN_BANK_IDX MUX &phandle>.
@@ -56,7 +68,8 @@ Examples:
pinctrl@20008000 {
compatible = "rockchip,rk3066a-pinctrl";
+ rockchip,grf = <&grf>;
+
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -105,16 +118,15 @@ Example for rk3188:
pinctrl@20008000 {
compatible = "rockchip,rk3188-pinctrl";
+ rockchip,grf = <&grf>;
+ rockchip,pmu = <&pmu>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio0: gpio0@0x2000a000 {
compatible = "rockchip,rk3188-gpio-bank0";
+ reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates8 9>;