drm/rockchip: dsi: add own additional pclk handling

A patch from »Support second Image Signal Processor on rk3399« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko.stuebner@...> Date: Mon, 1 Feb 2021 18:56:33 +0100

Commit-Message

In a followup patch, we'll need to access the pclk ourself to enable some functionality, so get and store it in the rockchip dw-dsi variant as well. Clocks are refcounted, so possible cascading enablements are no problem. Signed-off-by: Heiko Stuebner <heiko.stuebner@...>

Patch-Comment

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 ++++++++ 1 file changed, 8 insertions(+)

Statistics

  • 8 lines added
  • 0 lines removed

Changes

--------------- drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c ----------------
index 24a71091759c..18e112e30f6e 100644
@@ -223,6 +223,7 @@ struct dw_mipi_dsi_rockchip {
void __iomem *base;
struct regmap *grf_regmap;
+ struct clk *pclk;
struct clk *pllref_clk;
struct clk *grf_clk;
struct clk *phy_cfg_clk;
@@ -1051,6 +1052,13 @@ static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev)
return ret;
}
+ dsi->pclk = devm_clk_get(dev, "pclk");
+ if (IS_ERR(dsi->pclk)) {
+ ret = PTR_ERR(dsi->pclk);
+ DRM_DEV_ERROR(dev, "Unable to get pclk: %d\n", ret);
+ return ret;
+ }
+
dsi->pllref_clk = devm_clk_get(dev, "ref");
if (IS_ERR(dsi->pllref_clk)) {
if (dsi->phy) {
 
 

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