clk: rockchip: export HDMIPHY clock on rk3228
From: Heiko Stuebner <heiko@...> Date: Fri, 14 Jun 2019 10:59:48 +0200
Commit-Message
Export the hdmiphy clock mux via the newly added clock-id. Signed-off-by: Heiko Stuebner <heiko@...> Tested-by: Justin Swartz <justin.swartz@...>
Patch-Comment
drivers/clk/rockchip/clk-rk3228.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Statistics
- 1 lines added
- 1 lines removed
Changes
---------------------- drivers/clk/rockchip/clk-rk3228.c -----------------------
index 1c5267d134ee..d17cfb7a3ff4 100644
@@ -247,7 +247,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKGATE_CON(4), 0, GFLAGS),
/* PD_MISC */
+ MUX(SCLK_HDMI_PHY, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
RK2928_MISC_CON, 13, 1, MFLAGS),
MUX(0, "usb480m_phy", mux_usb480m_phy_p, CLK_SET_RATE_PARENT,
RK2928_MISC_CON, 14, 1, MFLAGS),