riscv: allow different stages with alternatives

A patch from »riscv: support for svpbmt and D1 memory types« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Fri, 17 Dec 2021 00:08:35 +0100

Commit-Message

Future features may need to be applied at a different time during boot, so allow defining stages for alternatives and handling them differently depending on the stage. Also make the alternatives-location more flexible so that future stages may provide their own location. Signed-off-by: Heiko Stuebner <heiko@...>

Patch-Comment

arch/riscv/errata/sifive/errata.c | 3 ++- arch/riscv/include/asm/alternative.h | 5 ++++- arch/riscv/kernel/alternative.c | 25 +++++++++++++++++-------- 3 files changed, 23 insertions(+), 10 deletions(-)

Statistics

  • 23 lines added
  • 10 lines removed

Changes

---------------------- arch/riscv/errata/sifive/errata.c -----------------------
index f5e5ae70e829..4fe03ac41fd7 100644
@@ -80,7 +80,8 @@ static void __init warn_miss_errata(u32 miss_errata)
}
void __init sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
- unsigned long archid, unsigned long impid)
+ unsigned long archid, unsigned long impid,
+ unsigned int stage)
{
struct alt_entry *alt;
u32 cpu_req_errata = sifive_errata_probe(archid, impid);
--------------------- arch/riscv/include/asm/alternative.h ---------------------
index e625d3cafbed..811bdd8027db 100644
@@ -17,6 +17,8 @@
#include <linux/stddef.h>
#include <asm/hwcap.h>
+#define RISCV_ALTERNATIVES_BOOT 0 /* alternatives applied during regular boot */
+
void __init apply_boot_alternatives(void);
struct alt_entry {
@@ -33,7 +35,8 @@ struct errata_checkfunc_id {
};
void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
- unsigned long archid, unsigned long impid);
+ unsigned long archid, unsigned long impid,
+ unsigned int stage);
#endif
#endif
----------------------- arch/riscv/kernel/alternative.c ------------------------
index 3b15885db70b..ead00c508266 100644
@@ -22,7 +22,8 @@ static struct cpu_manufacturer_info_t {
} cpu_mfr_info;
static void (*vendor_patch_func)(struct alt_entry *begin, struct alt_entry *end,
- unsigned long archid, unsigned long impid);
+ unsigned long archid, unsigned long impid,
+ unsigned int stage);
static inline void __init riscv_fill_cpu_mfr_info(void)
{
@@ -57,6 +58,18 @@ static void __init init_alternative(void)
* a feature detect on the boot CPU). No need to worry about other CPUs
* here.
*/
+static void __init _apply_alternatives(struct alt_entry *begin,
+ struct alt_entry *end,
+ unsigned int stage)
+{
+ if (!vendor_patch_func)
+ return;
+
+ vendor_patch_func(begin, end,
+ cpu_mfr_info.arch_id, cpu_mfr_info.imp_id,
+ stage);
+}
+
void __init apply_boot_alternatives(void)
{
/* If called on non-boot cpu things could go wrong */
@@ -64,11 +77,7 @@ void __init apply_boot_alternatives(void)
init_alternative();
- if (!vendor_patch_func)
- return;
-
- vendor_patch_func((struct alt_entry *)__alt_start,
- (struct alt_entry *)__alt_end,
- cpu_mfr_info.arch_id, cpu_mfr_info.imp_id);
+ _apply_alternatives((struct alt_entry *)__alt_start,
+ (struct alt_entry *)__alt_end,
+ RISCV_ALTERNATIVES_BOOT);
}
-
 
 

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