Zbb + fast-unaligned string optimization
From: Heiko Stuebner <heiko.stuebner@...> Date: Fri, 13 Jan 2023 22:09:04 +0100
This is a follow-up to my Zbb-based string optimization series, that then adds another strcmp variant for systems with Zbb that also can do unaligned accesses fast in hardware. For this it uses Palmer's series for hw-feature probing that would read this property from firmware (devicetree), as the performance of unaligned accesses is an implementation detail of the relevant cpu core. Right now we're still in the middle of discussing how more complex cpufeature-combinations should be handled in general, so this is more of a concept on one possible way to do it. Dependencies: - my Zbb string series https://lore.kernel.org/r/20230113212301.3534711-1-heiko@sntech.de - Palmer's hw-probing series https://lore.kernel.org/r/20221013163551.6775-1-palmer@rivosinc.com Heiko Stuebner (4): RISC-V: use bit-values instead of numbers to identify patched cpu-features RISC-V: add alternative-field for bits to not match against RISC-V: add cpufeature probing for fast-unaligned access RISC-V: add strcmp variant using zbb and fast-unaligned access arch/riscv/include/asm/alternative-macros.h | 64 ++++---- arch/riscv/include/asm/alternative.h | 1 + arch/riscv/include/asm/errata_list.h | 27 ++-- arch/riscv/kernel/cpufeature.c | 33 +++- arch/riscv/lib/strcmp.S | 170 +++++++++++++++++++- arch/riscv/lib/strlen.S | 2 +- arch/riscv/lib/strncmp.S | 2 +- 7 files changed, 245 insertions(+), 54 deletions(-) -- 2.35.1
Patches in this set
- [0001] RISC-V: use bit-values instead of numbers to identify (raw)
- [0002] RISC-V: add alternative-field for bits to not match (raw)
- [0003] RISC-V: add cpufeature probing for fast-unaligned access (raw)
- [0004] RISC-V: add strcmp variant using zbb and fast-unaligned (raw)
Statistics
- 4 individual patches
- 250 lines added
- 59 lines removed