RISC-V: expose Zbc as Kconfig option
From: Heiko Stuebner <heiko.stuebner@...> Date: Fri, 7 Jul 2023 13:20:37 +0200
Commit-Message
Similar to Zbb add a Zbc option to allow making further functionality depend on it. Signed-off-by: Heiko Stuebner <heiko.stuebner@...>
Patch-Comment
arch/riscv/Kconfig | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
Statistics
- 23 lines added
- 0 lines removed
Changes
------------------------------ arch/riscv/Kconfig ------------------------------
index 4c07b9189c86..cb5bd47c50c9 100644
@@ -531,6 +531,29 @@ config RISCV_ISA_ZBB
If you don't know what to do here, say Y.
+config TOOLCHAIN_HAS_ZBC
+ bool
+ default y
+ depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc)
+ depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc)
+ depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
+ depends on AS_HAS_OPTION_ARCH
+
+config RISCV_ISA_ZBC
+ bool "Zbc extension support for bit manipulation instructions"
+ depends on TOOLCHAIN_HAS_ZBC
+ depends on MMU
+ depends on RISCV_ALTERNATIVE
+ default y
+ help
+ Adds support to dynamically detect the presence of the ZBC
+ extension (carry-less multiplication) and enable its usage.
+
+ The Zbc extension provides instructions clmul, clmulh and clmulr
+ to accelerate carry-less multiplications.
+
+ If you don't know what to do here, say Y.
+
config RISCV_ISA_ZICBOM
bool "Zicbom extension support for non-coherent DMA operation"
depends on MMU