clk: rockchip: fix rk3288 pll status register location
From: Jianqun <jay.xu@...> Date: Mon, 1 Sep 2014 23:56:28 +0200
Commit-Message
In RK3288, APLL lock status bit is in GRF_SOC_STATUS1, but in RK3188, is GRFSOC_STATUS0. Signed-off-by: Jianqun <jay.xu@...> Reviewed-by: Heiko Stuebner <heiko@...> Tested-by: Heiko Stuebner <heiko@...>
Patch-Comment
drivers/clk/rockchip/clk-rk3288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Statistics
- 1 lines added
- 1 lines removed
Changes
---------------------- drivers/clk/rockchip/clk-rk3288.c -----------------------
index 038b1aa..4586578 100644
@@ -20,7 +20,7 @@
#include "clk.h"
#define RK3288_GRF_SOC_CON(x) (0x244 + x * 4)
+#define RK3288_GRF_SOC_STATUS 0x284
enum rk3288_plls {
apll, dpll, cpll, gpll, npll,