ARM: dts: rockchip: add saradc nodes
From: Heiko Stuebner <heiko@...> Date: Wed, 9 Jul 2014 10:56:00 +0200
Commit-Message
This adds devicetree nodes for the SAR A/D converter including the board specific regulator references for the two boards currently supported. Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 5 +++++ arch/arm/boot/dts/rk3188-radxarock.dts | 5 +++++ arch/arm/boot/dts/rk3xxx.dtsi | 11 +++++++++++ 3 files changed, 21 insertions(+)
Statistics
- 21 lines added
- 0 lines removed
Changes
-------------------- arch/arm/boot/dts/rk3066a-bqcurie2.dts --------------------
index 4174ff8..d90a058 100644
@@ -83,6 +83,11 @@
};
};
+ saradc: saradc@2006c000 {
+ status = "okay";
+ vref-supply = <&vpll_reg>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
-------------------- arch/arm/boot/dts/rk3188-radxarock.dts --------------------
index f277237..19d45b4 100644
@@ -52,6 +52,11 @@
vin-supply = <&vcc_io>;
};
+ saradc: saradc@2006c000 {
+ status = "okay";
+ vref-supply = <&vcc18>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
------------------------ arch/arm/boot/dts/rk3xxx.dtsi -------------------------
index 1623e21..69d866a 100644
@@ -261,5 +261,16 @@
clocks = <&cru PCLK_PWM23>;
status = "disabled";
};
+
+ saradc@2006c000 {
+ compatible = "rockchip,saradc";
+ reg = <0x2006c000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+ clock-names = "saradc", "apb_pclk";
+ #io-channel-cells = <1>;
+ clock-frequency = <1000000>;
+ status = "disabled";
+ };
};
};