clk: rockchip: add more rk3188 graphics clock ids

A patch from »ARM: rockchip: add power-domains for Cortex-A9 socs« in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Mon, 28 Aug 2017 01:34:15 +0200

Commit-Message

Add ids for cif, v{d/e}pu clocks on rk3188. ACLK_CIF does get a needed 1 at it's end but that should be safe because no driver for the camera interface has surfaced so far and the old vendor kernels for these socs are based on linux-3.0 and still used board files then, so there really are no previous users anywhere to be found. Signed-off-by: Heiko Stuebner <heiko@...>

Patch-Comment

include/dt-bindings/clock/rk3188-cru-common.h | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)

Statistics

  • 7 lines added
  • 2 lines removed

Changes

---------------- include/dt-bindings/clock/rk3188-cru-common.h -----------------
index eff4319d008b..b9462b7d3dfe 100644
@@ -68,12 +68,14 @@
#define ACLK_LCDC1 196
#define ACLK_GPU 197
#define ACLK_SMC 198
-#define ACLK_CIF 199
+#define ACLK_CIF1 199
#define ACLK_IPP 200
#define ACLK_RGA 201
#define ACLK_CIF0 202
#define ACLK_CPU 203
#define ACLK_PERI 204
+#define ACLK_VEPU 205
+#define ACLK_VDPU 206
/* pclk gates */
#define PCLK_GRF 320
@@ -134,8 +136,11 @@
#define HCLK_NANDC0 467
#define HCLK_CPU 468
#define HCLK_PERI 469
+#define HCLK_CIF1 470
+#define HCLK_VEPU 471
+#define HCLK_VDPU 472
-#define CLK_NR_CLKS (HCLK_PERI + 1)
+#define CLK_NR_CLKS (HCLK_VDPU + 1)
/* soft-reset indices */
#define SRST_MCORE 2
 
 

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