rockchip: misc: read cpuid either from efuse or otp

A patch from »rockchip: add support for px30« in state Mainline for u-boot

From: Heiko Stuebner <heiko.stuebner@...> Date: Wed, 25 Sep 2019 20:21:21 +0200

Commit-Message

Newer Rockchip socs use a different ip block to handle one-time- programmable memory, so depending on what got enabled get the cpuid from either source. Signed-off-by: Heiko Stuebner <heiko.stuebner@...>

Patch-Comment

arch/arm/mach-rockchip/misc.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)

Statistics

  • 6 lines added
  • 1 lines removed

Changes

------------------------ arch/arm/mach-rockchip/misc.c -------------------------
index c0e4fdbc00..bed4317f7e 100644
@@ -57,13 +57,18 @@ int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
{
-#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) || CONFIG_IS_ENABLED(ROCKCHIP_OTP)
struct udevice *dev;
int ret;
/* retrieve the device */
+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_GET_DRIVER(rockchip_efuse), &dev);
+#elif CONFIG_IS_ENABLED(ROCKCHIP_OTP)
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_GET_DRIVER(rockchip_otp), &dev);
+#endif
if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
 
 

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