From 8d339f90eee371f73059719a8546ae652755f97a Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 18 Nov 2019 15:01:53 +0100 Subject: [PATCH] rockchip: px30: enable fifo mode for both emmc and sdmmc on evb As part of loading trustedfirmware, the SPL is required to place portions of code into the socs sram but the mmc controllers can only do dma transfers into the regular memory, not sram. The results of this are not directly visible in u-boot itself, but manifest as security-relate cpu aborts during boot of for example Linux. There were a number of attempts to solve this elegantly but so far discussion is still ongoing, so to make the board at least boot correctly put both mmc controllers into fifo-mode, which also circumvents the issue for now. Signed-off-by: Heiko Stuebner --- arch/arm/dts/px30-evb-u-boot.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/px30-evb-u-boot.dtsi b/arch/arm/dts/px30-evb-u-boot.dtsi index 3de9c7068e..27b8364e6c 100644 --- a/arch/arm/dts/px30-evb-u-boot.dtsi +++ b/arch/arm/dts/px30-evb-u-boot.dtsi @@ -31,12 +31,15 @@ &sdmmc { u-boot,dm-pre-reloc; - /* temporary till I find out why dma mode doesn't work */ + /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ fifo-mode; }; &emmc { u-boot,dm-pre-reloc; + + /* mmc to sram can't do dma, prevent aborts transfering TF-A parts */ + fifo-mode; }; &grf { -- 2.24.0