From 402495eecfb099bdf9b88617db4581ca7a4c1211 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 15 Feb 2023 13:01:29 +0100 Subject: [PATCH RFC v2 07/16] RISC-V: add helper function to read the vector VLEN VLEN describes the length of each vector register and some instructions need specific minimal VLENs to work correctly. The vector code already includes a variable riscv_vsize that contains the value of "32 vector registers with vlenb length" that gets filled during boot. vlenb is the value contained in the CSR_VLENB register and the value represents "VLEN / 8". So add riscv_vector_vlen() to return the actual VLEN value for in-kernel users when they need to check the available VLEN. Signed-off-by: Heiko Stuebner --- arch/riscv/include/asm/vector.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h index f38266ec483a..ad9e6161dd89 100644 --- a/arch/riscv/include/asm/vector.h +++ b/arch/riscv/include/asm/vector.h @@ -163,4 +163,15 @@ static inline bool vstate_query(struct pt_regs *regs) { return false; } #endif /* CONFIG_RISCV_ISA_V */ +/* + * Return the implementation's vlen value. + * + * riscv_vsize contains the value of "32 vector registers with vlenb length" + * so rebuild the vlen value in bits from it. + */ +static inline int riscv_vector_vlen(void) +{ + return riscv_vsize / 32 * 8; +} + #endif /* ! __ASM_RISCV_VECTOR_H */ -- 2.39.0