From 40a6972b0c91cebb6fc0bbf0afbbf583fd50615b Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 28 Aug 2017 00:38:36 +0200 Subject: [PATCH v3 6/7] ARM: dts: rockchip: add qos nodes found on rk3066 and rk3188 QoS nodes keep information about priorites etc on the interconnect and loose state when the power-domain gets disabled. Therefore the power-domain driver stores the settings of available qos nodes and restores them when the power-domain gets enabled again. So add the qos nodes found on the Cortex-A9 socs from Rockchip, so that they can then be connected to the power-domains. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 40 +++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index d752dc611fd7..97307a405e60 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -147,6 +147,46 @@ status = "disabled"; }; + qos_gpu: qos@1012d000 { + compatible = "syscon"; + reg = <0x1012d000 0x20>; + }; + + qos_vpu: qos@1012e000 { + compatible = "syscon"; + reg = <0x1012e000 0x20>; + }; + + qos_lcdc0: qos@1012f000 { + compatible = "syscon"; + reg = <0x1012f000 0x20>; + }; + + qos_cif0: qos@1012f080 { + compatible = "syscon"; + reg = <0x1012f080 0x20>; + }; + + qos_ipp: qos@1012f100 { + compatible = "syscon"; + reg = <0x1012f100 0x20>; + }; + + qos_lcdc1: qos@1012f180 { + compatible = "syscon"; + reg = <0x1012f180 0x20>; + }; + + qos_cif1: qos@1012f200 { + compatible = "syscon"; + reg = <0x1012f200 0x20>; + }; + + qos_rga: qos@1012f280 { + compatible = "syscon"; + reg = <0x1012f280 0x20>; + }; + usb_otg: usb@10180000 { compatible = "rockchip,rk3066-usb", "snps,dwc2"; reg = <0x10180000 0x40000>; -- 2.18.0