From 3fedf3365b5a3c032230f7ed4622a66e2aacb951 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 14 Nov 2023 15:01:03 +0100 Subject: [PATCH] dt-bindings: PCI: dwc: rockchip: document optional pcie reference clock input On some boards the 100MHz PCIe reference clock to both controller and devices is controllable. Add that clock to the list of clocks. The clock is optional, so the minItems stays the same. Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 1ae8dcfa072c..5f719218c472 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -49,6 +49,7 @@ properties: - description: APB clock for PCIe - description: Auxiliary clock for PCIe - description: PIPE clock + - description: Reference clock for PCIe clock-names: minItems: 5 @@ -59,6 +60,7 @@ properties: - const: pclk - const: aux - const: pipe + - const: ref interrupts: items: -- 2.39.2