From 78929fe6c5d0fb71cf6f6ce5f7f3fd8508be8879 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 14 Dec 2018 23:20:02 +0100 Subject: [PATCH 08/15] arm64: dts: rockchip: default values for core clocks on rk3368 Add better default values for PLLs and core clocks on rk3368. This includes all plls as well as core aclk,hclk and pclk in both the cpu as well as peripheral domain. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 7014d10b954c..3ef1c27cb7d3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -650,6 +650,16 @@ rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; + assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>, + <&cru PLL_NPLL>, <&cru ACLK_BUS>, + <&cru HCLK_BUS>, <&cru PCLK_BUS>, + <&cru ACLK_PERI>, <&cru HCLK_PERI>, + <&cru PCLK_PERI>; + assigned-clock-rates = <594000000>, <400000000>, + <500000000>, <300000000>, + <150000000>, <75000000>, + <300000000>, <150000000>, + <75000000>; }; grf: syscon@ff770000 { -- 2.19.2