clk: rockchip: allow adjusting pll rates on init

A patchset in state Mainline for linux-kernel

From: Heiko Stuebner <heiko@...> Date: Wed, 19 Nov 2014 12:56:27 +0100

It was found that some firmware versions initialized the pll rates using suboptimal parameters to achieve frequencies the actual rate table contained better parameters for. Therefore this series first adds the possibility to create pll-specific flags and then adds a flag to adjust the pll rate on init to the parameters from the rate table. This series was tested on rk3066, rk3188 and rk3288 based boards. Heiko Stuebner (3): clk: rockchip: add ability to specify pll-specific flags clk: rockchip: add optional sync to pll rate parameters clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some plls drivers/clk/rockchip/clk-pll.c | 54 ++++++++++++++++++++++++++++++++++++++- drivers/clk/rockchip/clk-rk3188.c | 8 +++--- drivers/clk/rockchip/clk-rk3288.c | 10 ++++---- drivers/clk/rockchip/clk.c | 3 ++- drivers/clk/rockchip/clk.h | 13 ++++++++-- 5 files changed, 75 insertions(+), 13 deletions(-) -- 2.1.1

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  • 80 lines added
  • 18 lines removed
 

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