clk: rockchip: fix issues in the mmc-phase clock
From: Heiko Stuebner <heiko@...> Date: Sat, 4 Jul 2015 23:42:16 +0200
Commit-Message
The review for the new inverter clock type uncovered some issues (missing headers and name handling) that are also present in the mmc-phase clock type, I got (to much) inspiration from. Fix these there too. Signed-off-by: Heiko Stuebner <heiko@...>
Patch-Comment
drivers/clk/rockchip/clk-mmc-phase.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
Statistics
- 3 lines added
- 3 lines removed
Changes
--------------------- drivers/clk/rockchip/clk-mmc-phase.c ---------------------
index e9f8df32..f2c6889 100644
@@ -15,6 +15,8 @@
#include <linux/slab.h>
#include <linux/clk-provider.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
#include "clk.h"
struct rockchip_mmc_clock {
@@ -131,6 +133,7 @@ struct clk *rockchip_clk_register_mmc(const char *name,
if (!mmc_clock)
return NULL;
+ init.name = name;
init.num_parents = num_parents;
init.parent_names = parent_names;
init.ops = &rockchip_mmc_clk_ops;
@@ -139,9 +142,6 @@ struct clk *rockchip_clk_register_mmc(const char *name,
mmc_clock->reg = reg;
mmc_clock->shift = shift;
clk = clk_register(NULL, &mmc_clock->hw);
if (IS_ERR(clk))
goto err_free;