ARM: dts: rockchip: add phandles to secondary cpu cores

A patch from »ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet« in state Maintainer-tree for linux-kernel

From: Heiko Stuebner <heiko.stuebner@...> Date: Mon, 15 Oct 2018 14:46:19 +0200

Commit-Message

Add phandles to secondary cpu cores as we may need to reference these down the road as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@...>

Patch-Comment

arch/arm/boot/dts/rk3188.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

Statistics

  • 3 lines added
  • 3 lines removed

Changes

------------------------ arch/arm/boot/dts/rk3188.dtsi -------------------------
index f1f7a36b46d4..4acb501dd3f8 100644
@@ -28,7 +28,7 @@
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE0>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -36,7 +36,7 @@
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE1>;
};
- cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -44,7 +44,7 @@
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE2>;
};
- cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
 
 

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